A community hub for open-source hardware — and the teaching around it — in the classroom.
Europe's path to digital sovereignty, anchored by the EU Chips Act and the European Processor Initiative (EPI), critically depends on training a new generation of engineers capable of designing and verifying custom silicon.
Yet computer architecture and digital design courses across European universities still largely rely on closed, vendor-locked toolchains and abstract software simulators, leaving graduates one step removed from real-world silicon design flows. The open-source hardware movement, and the RISC-V instruction set architecture in particular, has catalyzed a shift: open-source educational System-on-Chips are starting to close the gap between architectural theory and physical hardware implementation.
A critical element is still missing, though: a dedicated venue where the faculty who deploy these platforms in undergraduate and graduate classrooms can meet, compare deployment experiences, exchange teaching materials, and align on a common academic roadmap. OpenSoC4HE fills this gap within the HiPEAC community, with an explicit focus on the education layer upon which the entire open-silicon stack ultimately depends.
The workshop features "turn-key" platforms such as Simply-V, and works through the practical hurdles teams actually hit — from choosing cost-effective FPGA boards, to bringing verification into the undergraduate curriculum, to teaching a full RTL-to-GDSII tape-out with both open-source and commercial EDA flows. Its main deliverable is a community-driven, open-access roadmap that lowers the barrier for others to adopt open-source hardware in their teaching.
We welcome contributions on, but not limited to:
Ready-to-teach open SoCs such as Simply-V.
Choosing cost-effective, bring-your-own-device boards for the classroom.
Bringing cocotb, UVM, and formal methods into the undergraduate curriculum.
Full RTL-to-GDSII flows, open PDKs, and MPW shuttles as teaching experiences.
Comparing commercial and open-source EDA flows, and how to teach both.
Reusable materials, rubrics, and a community-driven adoption path.
OpenSoC4HE combines several formats across the day:
The full schedule — invited talks, paper sessions, the hands-on tutorial on an open educational SoC, poster fast-pitches, and the closing community panel — will be published here once the program is finalized.
The detailed program will go live after author notifications (30 November 2026). Check back closer to the event, or follow HiPEAC 2027 for updates.
Contributors may choose one of three tracks:
A complete contribution presenting methods, platforms, or results.
A focused piece or a classroom experience report: what worked, what didn't.
Present without an accompanying paper — featured in the program.
Accepted papers follow a double-blind peer-review process and, if accepted, are published open-access in the HiPEAC workshop proceedings by Schloss Dagstuhl, indexed in DBLP and Scopus. Talk-only and demo-only contributions are featured in the program without an accompanying paper.
To express interest, send us the title of your intended contribution at your earliest convenience. The submission portal (EasyChair) link will be added here once it is live.
Author instructions and page limits will be announced here shortly.
All deadlines are end-of-day, anywhere on Earth (AoE).
Salvatore Bramante, Scuola IMT Alti Studi Lucca
Luigi Giuffrida, Politecnico di Torino
Jose Miranda, Universidad Politécnica de Madrid
Alessandra Dolmeta, Politecnico di Torino
Tobias Scheipel, Graz University of Technology
For further information, feel free to contact any of the workshop organizers.